The 65nm/55nm logic technology combines improved performance and reduced power consumption with increased design possibilities and cost efficiencies. The 65nm/55nm logic process standard offerings include Low Leakage (LL) and Ultra Low Power (ULP) platforms. Both LL and ULP processes offer three threshold voltage core devices and 1.8V, 2.5V and/or 3.3V I/O options to provide a flexible design platform. Design rules, specifications, and SPICE models are available for 65nm/55nm. Critical IPs are ready for 55nm LL/ULP and 65nm LL.