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0.18¦Ìm |
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Features
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Single
poly, six-metal-layer (Aluminum) process |
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Core
device options: generic (G) or low leakage (LL) |
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I/O
device options: 3.3V or 5V |
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Mixed
signal options: deep N-well, multiple-Vt MOSFET, high-resistance
poly, MiM capacitor, thick metal inductor |
Optimized for speed, power, density and cost, SMIC's 0.18¦Ìm process technology has been proven for a broad range of consumer, communications and computing applications. It also offers customers flexible solutions with modules for embedded memory, mixed signal or RF CMOS.
Using a single poly, six-metal-layer process, this technology features multiple voltages of 1.8V, 3.3V and 5V, and a high gate density of over 100,000 gates per mm2.
Embedded high-density
memory
To help customers meet the memory requirements of their system-on-chip
(SoC) designs, SMIC offers MoSys' 1T-SRAM at the 0.18¦Ìm node.
This technology offers a memory performance that is similar
to that of 6T-SRAM and about twice that of DDR DRAM on the same
logic manufacturing process while offering 100% density improvement
over conventional 6T-SRAM of same chip area. In addition, it
can reduce operating power consumption by four times compared
with traditional SRAM technology, which makes it ideal for embedding
large memories in SoC designs.
SMIC provides cost-effective and proven solutions at the 0.18 ¦Ìm node for smart cards and consumer electronics and various other applications. Our 0.18¦Ìm process technology family includes logic, mixed signal/RF, high-voltage, EEPROM and OTP technologies. These are supported by an extensive range of libraries and IP.
0.18¦Ìm libraries are available
through our library partners. For analog IP and I/O availability,
please refer to the Design Services section or contact us at
Design_Services@smics.com.
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