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0.13¦Ìm |
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Features
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Single
poly, eight-metal-layer (1P8M), Cu with FSG process |
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I/O device options: 2.5V or 3.3V |
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Mixed signal options: deep N-well, multiple-Vt MOSFET,
high-resistance poly, MiM capacitor, thick metal inductor |
SMIC's 0.13¦Ìm process technology uses an all-copper interconnect
approach to drive high-performance devices while enabling cost
optimization.
Using eight metal layers with a poly gate length of down to
0.08¦Ìm, our 0.13¦Ìm technology also offers generic devices with
a core voltage of 1.2V and I/Os with a supply voltage of 2.5V.
Low-voltage and low-leakage options are being developed.
Compared to the same device on SMIC's 0.15¦Ìm technology, our 0.13¦Ìm technology enables a substantial die size reduction of more than 25% and performance enhancement by as much as 30%. The die size can be reduced by more than 50% and chip performance increased by more than 50% when compared to our 0.18¦Ìm technology.
SMIC has already started multi-project
wafer (MPW) services at the 0.13¦Ìm node, and current customer
prototypes have resulted in good yields.
SMIC's 0.13¦Ìm CMOS-based technology family will eventually include mixed-signal/RF and embedded memory modules, which are currently under development.
0.13 ¦Ì m libraries and memory
compilers are available through our network of library partners.
For I/O and analog IP availability, please contact us at Design_Services@smics.com.
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