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40nm Low Leakage Technology
40nm Logic Baseline SMIC is the first foundry in mainland China to offer 40nm technology. SMIC offers its 40nm Low Leakage (LL) process with 1.1V core devices of three threshold voltage levels, as well as 2.5V I/O options (OD 3.3V, UD 1.8V), to meet various design application requirements. The 40nm logic process combines the most advanced immersion lithography, strain engineering technique, ultra shallow junction and low-k dielectric for power and performance optimization. The 40nm process technology enables high performance and low power consumption for applications such as baseband processors, application processors, high definition video processors and other consumer and communication equipment.


  • Core device: 1.1V (LL);overdrive to 1.2V is optional
  • Three different Vt level core devices for flexible design optimization
  • I/O device options: 2.5V (OD 3.3V, UD 1.8V)
  • Single-port and dual-port SRAM bit cells associated with memory compilers
  • 193nm immersion lithography for critical layers
  • Strain technique to enhance mobility
  • Millisecond anneal for ultra shallow junction
  • Up to 10M Cu/Low-k (k = 2.7)
  • Wire bond and flip chip options

40nm Logic Standard Offerings

Standard Offering 40LL (1.1V)
Core Device HVt
I/O Device 2.5V
2.5V OD 3.3V
2.5V UD 1.8V
Memory SP HD SRAM (0.242μm2)
SP HP SRAM (0.303μm2)
DP HD SRAM (0.477μm2)
DP HP SRAM (0.600μm2)

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